Programming inhibit for non-volatile memory

Details Programming inhibit for non-volatile memory Programming inhibit for non-volatile memory

2007-01-30

2007-01-30

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185170, C365S185180, C365S195000

Reexamination Certificate

active

10823421

ABSTRACT:
A non-volatile memory system is programmed so as to reduce or avoid program disturb. In accordance with one embodiment, the storage elements of a NAND string are partitioned into at least two regions. A first boosting voltage is applied to the first region of the string while a second larger boosting voltage is applied to the second region. The first region includes the addressed row or selected word line for programming. The boosting voltages are applied to the NAND strings of a block while the NAND strings are being inhibited from programming. In this manner, the second boosting voltage can be made larger without inducing program disturb on the memory cells receiving the larger boosting voltage. The boosted voltage potentials of the NAND string channels are trapped within the first region by lowering the boosting voltage on one or more bounding rows. The second boosting voltage is then lowered and data is applied to the bit lines of the NAND strings to select the appropriate strings for programming. The trapped voltage potential discharges or remains in the boosted state for programming depending on whether a string is selected for programming or is to remain inhibited from programming.

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