Programming floating gate devices

Static information storage and retrieval – Floating gate – Particular biasing

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365104, G11C 1140

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active

044344783

ABSTRACT:
A memory system is provided wherein extended injection-limited programming techniques attain a substantially uniform programming behavior from an ensemble of fabricated devices or cells to provide the maximum obtainable voltage threshold shift within a minimum time period. In order to produce these desired results, a floating gate of a device is charged by applying to the control gate of the device a first voltage during a portion of this time period which produces an accelerating field in a dielectric layer disposed adjacent to the floating gate and then applying to the control gate during the remaining portion of this time period a second voltage of greater magnitude than that of the first voltage prior to or when the accumulation of charge on the floating gate causes a retarding field to be established in the dielectric layer.

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P. E. Cottrell et al., IEEE Journal of Solid-State Circuits, vol. SC-14, No. 2, Apr. 1979, "Hot-Electron Emission in N-Channel IGFET's ", pp. 442-455.

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