Programming a non-volatile memory device

Details Programming a non-volatile memory device Programming a non-volatile memory device

2007-01-31

2010-06-15

Luu, Pho M (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S185170, C365S185190

Reexamination Certificate

active

07738295

ABSTRACT:
A non-volatile memory device that has a cache register coupled between each pair of bit lines and, in one embodiment, a data cache coupled between each pair of bit lines. The cache register toggles a bit when a memory cell on one of the bit lines to which it is coupled is successfully programmed. The set bit inhibits further programming on that bit line. The data cache is programmed with the original data to be programmed in the particular memory cell coupled to the respective bit line. A programming method performs a programming/verification operation until the memory cell is programmed. The data cache is then read and this data is used in a secondary programming operation, after the initial programming/verification operation, on the same memory cells.

REFERENCES:
patent: 7006382 (2006-02-01), Pekny et al.
patent: 7020017 (2006-03-01), Chen et al.
patent: 7046554 (2006-05-01), Lee
patent: 7142459 (2006-11-01), Pekny et al.
patent: 7440319 (2008-10-01), Li et al.
patent: 2004/0105314 (2004-06-01), Shibata et al.

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