Programming a NAND flash memory with reduced program disturb

Static information storage and retrieval – Floating gate – Multiple values

Reexamination Certificate

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C365S185240, C365S185020, C365S185180

Reexamination Certificate

active

08059456

ABSTRACT:
When a memory device receives two or more pluralities of bits from a host to store in a nonvolatile memory, the device first stores the bits in a volatile memory. Then, in storing the bits in the nonvolatile memory, the device raises the threshold voltages of some cells of the volatile memory to values above a verify voltage. While those threshold voltages remain substantially at those levels, the device raises the threshold voltages of other cells of the volatile memory to values below the verify voltage. In the end, every cell stores one or more bits from each plurality of bits. Preferably, all the cells share a common wordline. A data storage device operates similarly with respect to storing pluralities of bits generated by an application running on the system.

REFERENCES:
patent: 5774397 (1998-06-01), Endoh et al.
patent: 5943260 (1999-08-01), Hirakawa
patent: 6046935 (2000-04-01), Takeuchi et al.
patent: 6288935 (2001-09-01), Shibata et al.
patent: 7196928 (2007-03-01), Chen
patent: 7230851 (2007-06-01), Fong
patent: 7649784 (2010-01-01), Cho et al.
patent: 7885107 (2011-02-01), Park et al.
patent: 2002/0080660 (2002-06-01), Kanamitsu et al.
patent: 2002/0191459 (2002-12-01), Tsujikawa et al.
patent: 2003/0163634 (2003-08-01), Kim
patent: 2004/0052114 (2004-03-01), Kobayashi et al.
patent: 2005/0169057 (2005-08-01), Shibata et al.
patent: 2006/0023538 (2006-02-01), Nishihara et al.
patent: 2007/0086244 (2007-04-01), Zilberman
International Search Report dated Mar. 25, 2008, PCT Appl. PCT/IL2007/001344, filed Nov. 4, 2007.
PCT International Preliminary Report of Patentability, dated May 12, 2009, PCT Patent Appl. PCT/IL2007/001344.
Declaration of Jeffrey W. Lutze, dated Sep. 25, 2009.
Data Sheet for Samsung K9XXG08UXM, dated Apr. 25, 2006.
Taiwanese Office Action dated Aug. 30, 2011, Taiwanese Patent Application No. 096141741, filed Nov. 5, 2007, 10 pages.

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