Data processing: structural design – modeling – simulation – and em – Modeling by mathematical expression
Reexamination Certificate
2005-11-08
2005-11-08
Thomson, W. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Modeling by mathematical expression
C702S179000, C702S181000, C702S182000, C702S183000, C711S003000, C711S117000, C711S170000, C711S210000, C711S220000, C714S036000
Reexamination Certificate
active
06963823
ABSTRACT:
Design spaces for systems, including hierarchical systems, are programmatically validity filtered and quality filtered to produce validity sets and quality sets, reducing the number of designs to be evaluated in selecting a system design for a particular application. Validity filters and quality filters are applied to both system designs and component designs. Component validity sets are combined as Cartesian products to form system validity sets that can be further validity filtered. Validity filters are defined by validity predicates that are functions of discrete system parameters and that evaluate as TRUE for potentially valid systems. For some hierarchical systems, the system validity predicate is a product of component validity predicates. Quality filters use an evaluation metric produced by an evaluation function that permits comparing designs and preparing a quality set of selected designs. In some cases, the quality set is a Pareto set or an approximation thereof.
REFERENCES:
patent: 6226776 (2001-05-01), Panchul et al.
patent: 6298471 (2001-10-01), Schreiber
patent: 6374403 (2002-04-01), Darte et al.
patent: 6385757 (2002-05-01), Gupta et al.
patent: 6408428 (2002-06-01), Schlansker et al.
patent: 6438747 (2002-08-01), Schreiber et al.
patent: 6457173 (2002-09-01), Gupta et al.
patent: 6460173 (2002-10-01), Schreiber
patent: 6490716 (2002-12-01), Gupta et al.
patent: 6507947 (2003-01-01), Schreiber et al.
patent: 6629312 (2003-09-01), Gupta
patent: 6651222 (2003-11-01), Gupta et al.
patent: 6853970 (2005-02-01), Gupta et al.
Bard-J.F. “A Multiobjective Methodology for Selecting Subsystem Automation Options” Management Science 32: 1628-1641 (Dec. 1986).
Abraham et al.. “Automatic and Efficient Evaluation of Memory Hierarchies for Embedded Systems” HP Labs. IEEE 1999. p. 114-125.
Aditya et al. “Automatic Architechural Synthesis of VLIW and EPIC Processors” IEEE 1999 p. 107-113.
Rau-B.R. “Dynamically Scheduled VLIW Processors”. IEEE 1993 p. 80-92.
Jacome et al. “Lower Bound on Latency for VLIW ASIP Datapaths”. IEEE 1999 p. 216-268.
Gandhi et al. “Multiobjective Optimization of Large-Scale Structures” Jul. 1993 vol. 31 Wright State University p. 1329-1337.
Zitzler et al., Multiobjective Evolustionary Algorithms: A Comparitive Case Study and the Strength Pareto Approach IEEE vol. 3, No. 4 Nov. 1999 p. 257-271.
Abraham et al., “Automatic and Efficient Evaluation of Memory Hierarchies Embedded Systems” Hewlett-Packard Labs. Palo Alto Calf. Nov. 16-18, 1999. p. 114-125.
Yang et al., “Multiobjective Scheduling for IC Sort and Test with a Simulation Testbed” IEEE vol. 11, Num 2 May 1998. p. 304-315.
Schlansker et al., “EPIC: Explicitly Parallel Instruction Computing” Computing Practices Feb. 2000 p. 37-45.
J.F. Bard, “A Multiobjective Methodology For Selecting Subsystem Automation Options,”Management Science 32:1628-1641 (Dec., 1986).
Abraham Santosh G.
Rau B. Ramakrishna
Schreiber Robert S.
Stevens Tom
Thomson W.
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