Programmable unit for controlling and interfacing of I/O busses

Details Programmable unit for controlling and interfacing of I/O busses Programmable unit for controlling and interfacing of I/O busses

1994-11-16

1996-12-03

Ellis, Richard L.

G06F 1338

Patent

active

055817416

ABSTRACT:
A programmable I/O bus adapter for interfacing and controlling two data processing systems having dissimilar and incompatible architectures. The programmable I/O bus adapter is capable of controlling the I/O bus and adapters of each of the two data processing systems. Simultaneously, the I/O bus adapter provides for interfacing and communication between the two dissimilar data processing systems. Interfacing from the bus adapter to each data processing system is provided by circuitry provided on integrated circuit chip sets specifically designed to interface with each system. The interfacing circuitry is enabled to convert signals between each system to allow for communication. Communication paths couple the adapter to the I/O bus of each system. The ability to access and control an I/O bus and adapter of each system is provided by a microprocessor having microcode instructions stored in programmable memory. The microcode provides for self-contained operation of the I/O bus adapter by enabling it to independently perform I/O control functions of the coupled systems. The microprocessor may be implemented by using a RISC architecture microprocessor device.

REFERENCES:
patent: 3940743 (1976-02-01), Fitzgerald
patent: 4309754 (1982-01-01), Dinwiddie, Jr.
patent: 4586159 (1986-04-01), Thomas et al.
patent: 4709328 (1987-11-01), Anthony, Jr. et al.
patent: 4716527 (1987-12-01), Graciotti
patent: 4855905 (1989-08-01), Estrada et al.
patent: 4864496 (1989-09-01), Triolo et al.
patent: 4991085 (1991-02-01), Pleva et al.
patent: 5029074 (1991-07-01), Maskas et al.
patent: 5043877 (1991-08-01), Berger et al.
patent: 5083259 (1992-01-01), Maresh et al.
patent: 5129062 (1992-07-01), Gygi et al.
patent: 5191653 (1993-03-01), Banks et al.
"System/9370 I/O Bus to Micro Channel Attachment" Boguski et al; IBM Tech Disclosure Bulletin; vol. 33 No. 5; Oct. 1990; pp. 326-328.
"Interfacing Industrial Computers to the Personal Computer Standard Bus" Adams et; IBM Tech Disc Bltn; vol. 33 No. 3A; Aug. 1990; pp. 274-275.
"Micro Channel/Multibus-II Interface" by D'Ambrose et al; IBM Technical Disclosure Bulletin; vol. 33 No. 3B; Aug. 1990; pp. 409-411.
"Async Workstation Subsystem Capacity Enhancement Via Port Arbitration" Carissimo et; IBM Bltn; vol. 34 No. 3; Aug. 1991; pp. 98-103.
"Micro Channel Planar to Adapter Card Interrupt Redirection" Dean et al; IBM Tech Disc Bulletin; vol. 34 No. 3; Aug. 1991; pp. 392-393.

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