Programmable transmitter circuit for coupling to an ethernet...

Pulse or digital communications – Transceivers

Reexamination Certificate

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Details

C375S361000

Reexamination Certificate

active

06687286

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to integrated electronic circuits, and more specifically to line drivers for data transmission.
BACKGROUND OF THE INVENTION
A 10/125 Mbaud fast Ethernet transceiver requires a line driver that can accommodate the line code for both 10 Mbaud and 125 Mbaud data rates. In addition, the line driver must meet stringent standard specifications. Also, with today's applications demanding smaller component size and smaller power supplies, it is desirous to implement the line driver at low voltages, within a small area, and at low power. Typical solutions to this problem at 5V have either employed two or three separate drivers, and do not offer the flexibility of programmability for various standard specifications.
In 10 Mbaud mode, the IEEE standard (Carrier Sense Multiple Access With Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications, ISO/IEC 8802-3, ANSI/IEEE std. 802.3, Fourth edition Jul. 8, 1993) requires the transmitter to source a filtered Manchester code. The filtered output signal is a combination of a 5 MHz and a 10 MHz sinusoid of 5V
pp
amplitude level. In addition, the standard specification on linearity requires that the transmitter must maintain greater than 27 dB harmonic distortion suppression. The allowed amplitude variation is ±10% about the nominal level.
In 125 Mbaud mode, two sub-modes must be supported; a three level line code, MLT3 and a two level NRZI line code. The IEEE standard (Fibre Distributed Data Interface (FDDI)—Token Ring Twisted Pair Physical Layer Meduim Dependent (TP-PMD), ANSI X3.263-1995, September 1995) requires that the MLT3 line code have a rise and fall-time between 3 ns and 5 ns with symmetry of 0.5 ns and peak-to-peak jitter less than 1.4 ns. The maximum allowed skew between a rise transition and a fall transition (also known as duty cycle distortion), when measured at
V



pk
2
=
0.5



V
,
must be no greater than 0.5 ns. In addition, the transmit amplitude must be 1V
pk
±5%.
Power dissipation is also a concern. It is desirable that a given function have a lowest possible power dissipation. However, practical limitations yield an overhead power that must be dissipated. Thus, it is desired to minimize this overhead, or alternatively, maximize power efficiency. Typical twisted pair drivers for Ethernet and fast Ethernet do not work below 3V and are large because multiple drivers are implemented (J. Everitt, J. F. Parker, P. Hurst, D. Nack and K. R. Konda, “A CMOS Transceiver for 10-Mb/s and 100-Mb/s Ethernet,” IEEE J. Solid-State Circuits, vol. 33, pp. 2169-2177, December; and R. H. Leonowich, O. Shoaei, and A Shoval, “Methods and Apparatus for Providing Analog-FIR-Based Line-Driver with Pre-Equalization,” U.S. Patent submission, March 1998).
A prior art line driver is shown in FIG.
1
. In 100 Base-TX mode the IEEE specifications require ±1V
pk
between nodes v
op
105
and v
on
110
when transmitting digital “1”, and 0V when transmitting digital “0”. Hence, a “1” is achieved by closing switches S
1
115
and S
2
120
and opening switches S
3
125
and S
4
130
. A “0” is achieved by opening all four switches. Using a 1:N transformer and a peak voltage v
op
105
−v
on
110
=1V
pk
, the following current is required from the line driver for R
L
135
=100&OHgr;, assuming the most power demanding 4 bit repetitive pulse sequence [0 1 0−1] is being transmitted:
I
av
=
20

N
+
0
+
20

N
+
0
4
=
10

NmA
(
1
)
The total power dissipation is therefore 10 NV
dd
mW. The voltage between the nodes v
pp
140
and v
pn
145
is thus
V
pk
N
.
The current the device must source at its output pins is therefore increased by a factor N while the voltage is reduced by the same factor relative to the current and voltage seen at the load, R
L
135
. Having N>1 increases the current the driver must source, hence increasing total supply power dissipation. This choice is not desirable if the goal is to minimize power supply dissipation. Choosing N<1 certainly helps reduce power dissipation, however this is not desirable in 100 Base-TX mode due to reduced transformer bandwidth performance and is impractical in 10 Base-T mode where a 2.5 N V
pk
signal is required from a 3V supply. Therefore, a 1:1 transformer must be used. This ideal driver would thus dissipate a minimum of
P
av
=(10 mA)
V
dd
=33 mW  (2)
In 10 Base-T mode the IEEE specifications require ±2.5V
pk
between nodes v
op
105
and v
on
110
. The transmit symbols are either a 10 MHz sinusoidal pulse (single bit) or a 5 MHz pulse (double bit). Thus, a 10 MHz pulse requires for all “1”s data (continuous 10 MHz sinusoid)
I
av
=
2
π

I
max
=
2
π

50

mA
=
32

mA
(
3
)
for a total power dissipation at 3.3V of
P
av10
=105 mW, for all “1”s data  (4)
In 10 Base-T mode, receive equalization is not employed, hence there exists some cable length, C
max
, at which the transmitted 5V
pp
10 MHz pulse will be attenuated by the cable and will be too small to be detected by another entity on the Ethernet. Since cable attenuation is a function of frequency, the 5 MHZ pulse will not suffer as much loss as the 10 MHz pulse. As a result, the 5 MHz preamble will be detected and the 10 MHz sinusoid pulse will cause carrier loss. It is therefore desirable to shape the 5 MHz pulse such that after passing through a cable of length C
max
, both the 10 MHz pulse and the 5 MHz pulse have the same amplitude. Shaping of the 5 MHz pulse is signal pre-emphasis. The average current dissipated when transmitting a 5 MHz pulse is proportional to the amount of pre-emphasis. The more emphasis, the more power dissipation. Therefore, a design trade-off exists between power dissipation and maximum cable length that can be accommodated.
FIG. 2
is a graph illustrating the relationship between power dissipation and cable length. In
FIG. 2
, region A
205
shows the over-emphasized region where more power is dispensed (more emphasis), and does not imply improved cable performance. Region A
205
, is an undesirable region of operation because carrier loss will occur. Region B
210
is the proper region of operation where less pre-emphasis reduces the received 5 MHz amplitude relative to the 10 MHz pulse and hence, for error free performance, the cable length must be reduced as emphasis is reduced to reduce power dissipation. Region C
215
occurs where the less pre-emphasis makes the 5 MHz pulse width too narrow to represent a double bit at any cable length. The average current dissipated in 10 Base-T mode is therefore from (3)
I
av
=
50

[
2
π

ρ
+
(
1
-
ρ
)

κ
]

mA
(
5
)
where &rgr; represents the percentage of 10 MHz pulses over time and &kgr; represents the scale factor for the current, I
max
, as function of pre-emphasis. Recall from (3) that for 2.5V
pk
on the 100&OHgr; load, we require I
max
=50 mA to generate a 5 MHz square wave pulse. For equally likely 10 MHz and 5 MHz pulses, &rgr;=0.5, and with &kgr;=0.8 (about 50% emphasis) and at 3.3V supplies we obtain a minimal power dissipation of
P
av
=I
av
=V
dd
=119 mW, for random data  (6)
This condition occurs when C
max
=140 m for CAT3 cable for which the 5 MHz and 10 MHz received amplitudes are similar. This condition is depicted by point O
220
in FIG.
2
. From (5) we note that if the 5 MHz shaping were not employed, P
av
=135 mW, hence pre-emphasis provides a 16 mW savings when &kgr;=0.8.
SUMMARY OF THE INVENTION
The present invention provides a single integrated programmable transmitter circuit, for Ethernet as well as Fast Ethernet applications including a line driver portion, a control portion, and a FIR filter portion.
The line driver accommodates binary encoded data and provides output data encoded in one of three selectable formats. These formats include Manchester encoding, MLT3, or NRZI. The line driver receives

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