Static information storage and retrieval – Floating gate – Particular biasing
Patent
1992-03-06
1993-09-21
Clawson, Jr., Joseph E.
Static information storage and retrieval
Floating gate
Particular biasing
36518905, 36523006, 307201, 307469, G11C 1140
Patent
active
052474780
ABSTRACT:
A programmable, non-volatile transfer-device includes floating gate structures to control the transfer of signals from a set of inputs to a single output. Each floating gate structure includes two gates, logically coupled to each other in a master/slave mode, whereby the programming of the first gate controls the operation of the second gate. The floating gate structures are combined to implement a programmable multiplexer, without the use of static-RAM cells.
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Erich Goeting et al., "A CMOS Electrically-Reprogrammable ASIC with Multi-Level Random Logic Capabilities", 1986 IEEE International Solid-State Circuits Conference, pp. 244-245 (1986).
Cliff Richard G.
Gupta Anil
Altera Corporation
Clawson Jr. Joseph E.
Jackson Robert R.
Morris Robert W.
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