Programmable timing circuit

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Details

328 59, H03K 5159

Patent

active

043273289

ABSTRACT:
Time delayed signals are produced by apparatus including an oscillator which provides signals at a constant frequency to a multi-stage frequency divider. One of the stages of the divider is selected and is applied to a multiple-stage frequency divider which provides signals at outputs of various stages thereof. At least a portion of the outputs of the various stages are utilized for controlling the selection of the stage applied to the multiple-stage frequency divider. A digital to analog converter, responsive to the outputs of the multiple-stage frequency divider, provides an analog output signal to a comparator. The comparator provides an output signal when the analog output signal is at least equal to a predetermined voltage.

REFERENCES:
patent: 4064423 (1977-12-01), Atkisson, Jr.
patent: 4199276 (1980-04-01), Bukosky et al.

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