Electrical pulse counters – pulse dividers – or shift registers: c – Systems – With programmable counter
Patent
1988-03-02
1990-01-30
Heyman, John S.
Electrical pulse counters, pulse dividers, or shift registers: c
Systems
With programmable counter
377 30, 377 55, 3072021, H03K 2100, H03K 2300, G04C 300
Patent
active
048978604
ABSTRACT:
A timeout circuit with internal calibration includes an oscillator (11) for generating an initial frequency for division by a modulo-n counter (20). The counter (20) receives the value of n from a calibration register (22) and divides the frequency of the oscillator by the value of n. A gate (26) prevents alteration of the contents of the register (22). The output of the counter (20) provides a calibrated frequency which is further divided by a day counter (32) for output to a countdown counter (34). The countdown counter (34) provides a predetermined countdown of the signal output by the day counter (32) and, at the end of the count, generates a Timeout signal. The predetermined countdown value is determined by a value stored in a register (36) which can be protected by a customer lock out circuit (42).
REFERENCES:
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patent: 4015208 (1977-03-01), Hammer et al.
patent: 4140970 (1979-02-01), Graziano
patent: 4199726 (1980-04-01), Bukosky et al.
patent: 4218871 (1980-08-01), Moritani et al.
patent: 4330751 (1982-05-01), Swain
patent: 4446534 (1984-05-01), Smith
patent: 4523271 (1985-06-01), Levien
patent: 4716586 (1987-12-01), Bauer
Dias Donald R.
Lee Robert D.
Dallas Semiconductor Corporation
Duong Tai V.
Heyman John S.
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