Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2007-06-01
2010-12-21
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
C713S001000
Reexamination Certificate
active
07856614
ABSTRACT:
A programmable system-on-chip (SOC) apparatus is disclosed. After connecting with a computer host, the apparatus temporarily stored boot loader codes into a volatile memory originally installed in the apparatus. Further, during the whole updating firmware procedure, no burner is required. Accordingly, the invention not only saves the hardware cost of both a non-volatile memory and the burner, but also simplifies the operation procedure.
REFERENCES:
patent: 2004/0030953 (2004-02-01), Sun et al.
patent: 2004/0068644 (2004-04-01), Hutton et al.
patent: 2005/0097499 (2005-05-01), Sun et al.
patent: 2005/0160217 (2005-07-01), Gonzalez et al.
Chen Chien-Chou
Lu Chi-Chang
Tsai Pei-Ting
Chiang Jack
Etron Technology Inc.
Memula Suresh
Muncy Geissler Olds & Lowe, PLLC
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