Programmable system for prioritizing and collecting central proc

Details Programmable system for prioritizing and collecting central proc Programmable system for prioritizing and collecting central proc

1993-04-26

1995-01-10

Ray, Gopal C.

Multiplex communications

Wide area network

Packet switching

370 856, 34082551, 3642412, 3642413, 3642414, 3642415, 3642301, 364238, 364259, 3642592, 364DIG1, G06F 1326, G06F 946

Patent

active

053815521

ABSTRACT:
A priority selector prioritizes interrupts associated with each ASIC of a plural ASIC system in accordance with a programmed sequence. A table in each ASIC contains a programmable offset table and a programmable priority code table. The table selects an offset value and a priority code associated with the highest priority interrupt for the ASIC. An interrupt collector includes a priority compare to identify the priority code of the highest-priority interrupt of all of the ASICs. A multiplexer selects the offset value associated with it. The offset value forms a jump or offset address to the interrupt for the CPU. The priority sequencing, offset tables, priority code tables and priority compare values are programmable, so the prioritizing is adjustable. Each priority selector generates an interrupt active signal for the CPU. A mask disables interrupts until serviced by the CPU so that any interrupt active signal resulting from a disabled interrupt is terminated.

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Birch et al, "Priority Determination and Servicing I/O Devices", IBM Technical Disclosure Bulletin, vol. 16, No. 3, Aug. 1973, pp. 874-875.
Beukema et al, "Asynchronous Command Prioritization", IBM Technical Disclosure Bulletin, vol. 23, No. 4, Sep. 1980, pp. 1610-1614.

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