Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2008-07-01
2008-07-01
Elms, Richard T. (Department: 2824)
Static information storage and retrieval
Floating gate
Multiple values
C365S185180, C365S185280
Reexamination Certificate
active
07394686
ABSTRACT:
A semiconductor storage cell includes first and second source/drain regions underlying first and second trenches defined in a semiconductor substrate. Sidewalls of the trenches are lined with a charge storage stack that includes a layer of discontinuous storage elements (DSEs), which are preferably silicon nanocrystals. Spacer control gates are located in the trenches adjacent to the charge storage stacks on the trench sidewalls. The trench depth exceeds the spacer height so that a gap exists between a top of the spacers and the top of the substrate. A continuous select gate layer overlies the first trench. The gap facilitates ballistic programming of the DSEs adjacent to the gap by accelerating electrons traveling substantially perpendicular to the trench sidewalls. The storage cell may employ hot carrier injection programming to program a portion of the DSEs proximal to the source/drain regions.
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Chindalore Gowrishankar L.
Swift Craig T.
Elms Richard T.
Freescale Semiconductor Inc.
Sofocleous Alexander
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