Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2007-12-11
2007-12-11
Tran, Michael T (Department: 2827)
Static information storage and retrieval
Interconnection arrangements
C365S189050
Reexamination Certificate
active
11195910
ABSTRACT:
A programmable strength output buffer intended for use within the address register of a memory module such as a registered DIMM (RDIMM). The output signals of an array of such buffers drive respective output lines that are connected to the address or control pins of several RAM chips. The programmable buffers vary the strength of at least some of the output signals in response to a configuration control signal, such that the output signals can be optimized for the loads to which they will be connected.
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Raghavan Gopal
Srivastava Nikhil K.
Yen Jeffrey C.
Inphi Corporation
Koppel, Patrick, Heybl & Dawson
Tran Michael T
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