Boots – shoes – and leggings
Patent
1978-12-27
1980-12-02
Springborn, Harvey E.
Boots, shoes, and leggings
G06F 906
Patent
active
042375452
ABSTRACT:
A programmable sequential logic circuit processes data according to a prom containing instructions of different lengths, each instruction composed of one or several words. The sequential logic circuit comprises a memory containing the instructions and data words, an arithmetic and logical processing unit (ALU), and an instruction register for temporarily storing an instruction word read from the memory. An adder is connected to index the contents of address registers by adding the contents of one of a plurality of data registers. A system clock circuit driven by a clock and an operation code in the instruction register to control the operation of the sequential logic circuit. Access to the ALU is through an input multiplexer inputs of which are connected to the output of the memory and the outputs of the data registers and of the address registers. The output of the ALU is connected to an output bus via a circuit having outputs which adopt a high impedance state when they are not enabled. The output bus is also connected to the inputs of the memory and of the data registers. Complete processing of an instruction according to the instruction word temporarily stored in the instruction register is performed in a plurality of phases under the control of the system clock circuit. A first portion of the plurality of phases is devoted to acquisition of one or several data or instruction words, and the second portion is devoted to the execution of an operation by the ALU according to the operation code maintained in the instruction word stored in the instruction register.
REFERENCES:
patent: 3210733 (1965-10-01), Terzian et al.
patent: 3340513 (1967-09-01), Kinzie et al.
patent: 3430202 (1969-02-01), Downing et al.
patent: 3657705 (1972-04-01), Mekota, Jr. et al.
Deglin Rene
Reymond Gilbert
Compagnie Industrielle des Telecommunications Cit-Alcatel S.A.
Springborn Harvey E.
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