Excavating
Patent
1980-06-17
1982-07-13
Smith, Jerry
Excavating
324 73R, 364200, 371 20, G01R 3128, G06F 1100
Patent
active
043398197
ABSTRACT:
A circuit for use in an in-circuit digital tester for generating data bus and control line test signals to test the electrical performance properties of components in a circuit under test is disclosed. Certain components in a circuit under test, such as microprocessors, are bus oriented devices which perform their functions in predetermined cycles. These cycles have been divided up into control signals and data bus signals. Each sequence of control signals are referred to as a protocol sequence. Each test pin in the bed of nails test fixture has a digital test signal generator associated therewith. The present invention operates to program each test signal generator with digital test signal generating data to produce each protocol sequence of the device under test. Test cycles are then run in which a predetermined sequence of protocol sequences are generated to test the device. This predetermined sequence in protocol sequences is specified by a sequence in starting addresses of the various protocol sequences programmed into the generators.
REFERENCES:
patent: 3916178 (1975-10-01), Greenwald
patent: 4125763 (1978-11-01), Drabing et al.
patent: 4127768 (1978-11-01), Negi et al.
patent: 4128873 (1978-12-01), Lamiaux
patent: 4200224 (1980-04-01), Flint
patent: 4216539 (1980-08-01), Raymond et al.
Smith Jerry
Zehntel, Inc.
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