Static information storage and retrieval – Addressing
Patent
1985-12-24
1989-02-14
Fears, Terrell W.
Static information storage and retrieval
Addressing
365226, 307530, G11C 800, G11C 700, H03F 345
Patent
active
048051500
ABSTRACT:
In a programmable semiconductor memory device, a plurality of transistors operated as switches are provided, one switch transistor for each row and/or column lines. These switch transistors are divided into a plurality of groups. One terminal of each switch transistor is connected to the corresponding row and/or column line. A plurality of high voltage supply circuits are provided, one for each switch transistor group. A supplemental decoder is employed to select the switch transistor connected to the row and/or column line selected by a row and/or column decoder, to turn the selected switch transistor on so that the selected row and/or column line is supplied with a high voltage from the high voltage supply cirucit corresponding to the group including the selected switch transistor.
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"High-Voltage Regulation and Process Considerations for High-Density 5 V-Only E.sup.2 PROM's", Oto et al., 8107.
IEEE Journal of Solid-State Circuits, vol. SC-18, No. 5 New York, USA; pp. 532-538.
Asano Masami
Iwahashi Hiroshi
Fears Terrell W.
Kabushiki Kaisha Toshiba
Koval Melissa J.
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