Programmable semiconductor memory device

Details Programmable semiconductor memory device Programmable semiconductor memory device

1998-06-30

2000-02-15

Nguyen, Viet Q.

Static information storage and retrieval

Addressing

Sync/clocking

36523001, 365226, 36523008, 36523006, G11C 700

Patent

active

060260521

ABSTRACT:
A semiconductor memory device is provided with terminals for receiving a chip enable signal and an address signal, an internal circuit, and an internal control signal generating circuit for generating a predetermined internal control signal which makes an output timing of the semiconductor memory device same regardless of a level of the address signal when the chip enable signal undergoes a transition from an inactive level to an active level. The internal circuit is deactivated in response to the inactive level of the chip enable signal and is activated in response to the active level of the chip enable signal.

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