Programmable semiconductor memory apparatus

Static information storage and retrieval – Addressing – Plural blocks or banks

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Details

365184, 365125, 365200, G11C 802

Patent

active

049982230

ABSTRACT:
A programmable semiconductor memory apparatus comprises a memory cell array, a data sense circuit for reading data from the memory cell array, and a bus line connected to a common node of a plurality of bit lines forming the memory cell array and to the data sense circuit, a circuit for storing an identifying code for identifying the programmable semiconductor memory apparatus is connected to the bus line, thereby enabling the identifying code to be read externally.

REFERENCES:
patent: 4622653 (1986-11-01), McElroy
patent: 4667313 (1987-05-01), Pinkham et al.
patent: 4742486 (1988-05-01), Takemae et al.
patent: 4789967 (1988-12-01), Liou et al.
patent: 4881200 (1989-11-01), Urai

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