Static information storage and retrieval – Floating gate – Particular connection
Patent
1994-03-15
1998-09-22
Nelms, David C.
Static information storage and retrieval
Floating gate
Particular connection
365218, G11C 1604
Patent
active
058124535
ABSTRACT:
Memory cells are divided into a plurality of series circuit units arranged in matrix fashion and comprising some memory cells connected in series. The memory cells each consist of non-volatile transistors provided with a control gate electrode, a floating gate electrode and an erase gate electrode. Bit lines to which one end of each of the series circuit units of the plurality of series circuit units arranged in one row are connected in common. Column lines are provided in common for the series circuit units that are arranged in one column and that are respectively connected to each control gate electrode of the memory cells constituting each of the series circuit unit. A voltage by which the selected non-volatile transistor works in a saturation state is applied to the control gate electrode of the selected transistor of a series circuit unit by a column line, thereby injecting hot electrons from the semiconductor substrate into the floating gate electrode. Another voltage by which the non-selected non-volatile transistor works in a non-saturation operation is applied to the gate electrodes of the remaining non-volatile transistors of the series circuit unit. By sequentially selecting memory cells in one series circuit unit, the sequential data writing operation is performed. The sequential data reading operation is performed in a similar manner.
REFERENCES:
patent: 4130900 (1978-12-01), Watanabe
patent: 4207618 (1980-06-01), White, Jr. et al.
patent: 4233526 (1980-11-01), Kurogi et al.
patent: 4344156 (1982-08-01), Eaton, Jr. et al.
patent: 4371956 (1983-02-01), Maeda et al.
patent: 4377857 (1983-03-01), Tickle
patent: 4384349 (1983-05-01), McElroy
patent: 4437172 (1984-03-01), Masuoka
patent: 4437174 (1984-03-01), Masuoka
patent: 4467453 (1984-08-01), Chiu et al.
patent: 4480320 (1984-10-01), Naiff
patent: 4533843 (1985-08-01), McAlexander, III et al.
patent: 4580247 (1986-04-01), Adam
patent: 4639892 (1987-01-01), Mizugaki et al.
patent: 4648074 (1987-03-01), Pollachek
patent: 4694427 (1987-09-01), Miyamoto et al.
patent: 4694431 (1987-09-01), Miyamura et al.
patent: 4698787 (1987-10-01), Mukherjee et al.
patent: 4742491 (1988-05-01), Liang et al.
patent: 4763305 (1988-08-01), Kuo
patent: 4855954 (1989-08-01), Turner et al.
patent: 4933904 (1990-06-01), Stewart et al.
Masuoka et al., "New Ultra High Density EPROM and Flash EEPROM with NAND Structure Cell", 1987 IEDM, Dec.1987, pp. 552-555.
Fukuda et al., "1 Mbit CMOS EPROM: HN27C101 and HN27C301", Hitachi Review, vol. 35, No. 5, Oct. 1986, pp. 263-266.
Stewart et al., "A High Density EPROM Cell and Array", Symposium on VLSI Technology, Digest of Technology Papers, May 1986, pp. 89-90.
Kupec et al., "Triple Level Polysilicon EPROM With Transistor Per Bit", IEDM Technical Digest, International Electron Devices Meeting, Dec. 8-10, 1980, Washington, D.C., pp. 602-606.
Adler, "Densely Arrayed EEPROM Having Low-Voltage Tunnel Write", IBM Technical Disclosure Bulletin, vol. 27, No. 6 Nov. 1984, pp. 3302-3307.
Kotecha, "Electrically Alterable Non-volatile Logic Circuits", IBM Technical Disclosure Bulletin, vol. 24, No. 7B, Dec. 1981, pp. 3811-3812.
Cioaca et al., "A Million-Cycle CMOS 256K EEPROM", 1987 IEEE International Solid State Circuits Conference, Digest of Technical Papers, Feb. 25-27, 1987, pp. 78-79.
Samachisa et al., "A 128K Flash EEPROM Using Double Polysilicon Technology", 1987 IEEE International Solid State Circuits Conference, Digest of Technical Papers, Feb. 25-27, 1987, pp. 76-77.
Ho Hoai
Kabushiki Kaisha Toshiba
Nelms David C.
LandOfFree
Programmable semiconductor memory does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Programmable semiconductor memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programmable semiconductor memory will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1629664