Programmable secondary clock generator

Oscillators – Automatic frequency stabilization using a phase or frequency... – Tuning compensation

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331 1A, H03L 7199

Patent

active

052569942

ABSTRACT:
A secondary clock generator circuit is described in which a ratio is programmed into circuitry which will be embedded on all components. The programmable circuitry takes the system's master clock signal multiplies it by the programmed ratio and yields a secondary clock signal equal to the ratio times the master clock signal for driving components and interfaces. The invention is particularly useful in computer systems operating at a first clock frequency which have replaceable components that run at different clock frequencies and where it is desired to provide a synchronization between the system clock and the various component clocks.

REFERENCES:
patent: 3383619 (1968-05-01), Naubereit et al.
patent: 4528523 (1985-07-01), Crowley
patent: 4968950 (1990-11-01), Babin et al.

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