Programmable read only memory with means for discharging bit lin

Static information storage and retrieval – Read only systems

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365104, 365185, 365201, 36518903, 365194, 365203, 371 211, G11C 700, G11C 1142

Patent

active

049377876

ABSTRACT:
A semiconductor memory in which each of memory cells includes a memory transistor having a control gate connected to a word line, a floating gate and a drain-source path connected to a bit line, is disclosed. In a data programming operation mode, a programming voltage is applied via the word and bit lines to the control gate and the drain-source path of the memory transistor to inject carriers into the floating gate thereof. In order to detect whether or not the memory transistor is well programmed, a program verifying operation is carried out successively. To this end, the bit line is discharged to the low level and the word line is then supplied with a reading-out voltage. If the data programming is insufficient, the memory transistor is turned ON by the reading-out voltage, so that the bit line is held at a level near the low level. On the other hand, in case where the memory transistor is well programmed, it is not turned ON by the reading-out, so that the bit line is charged.

REFERENCES:
patent: 4543647 (1985-09-01), Yoshida
patent: 4553225 (1985-11-01), Ohe
patent: 4612630 (1986-09-01), Rosier
patent: 4737936 (1988-04-01), Takeuchi
patent: 4779272 (1988-10-01), Kohda et al.

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