Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Counter includes circuit for performing an arithmetic function
Patent
1994-07-01
1997-03-25
Heckler, Thomas M.
Electrical pulse counters, pulse dividers, or shift registers: c
Systems
Counter includes circuit for performing an arithmetic function
377 51, 395555, H03K 302, G06F 108
Patent
active
056152418
ABSTRACT:
A rate generator for use in a video server or other computer system requiring the generation of multiple timing signals from a single fixed frequency clock signal is disclosed. The rate generator stores a count value, a subtrahend value and a preload value for each timing signal that must be generated. The subtrahend value is subtracted from the count value. If this causes an underflow, an underflow signal, which comprises the generated timing signal, is asserted. The preload value is then added to the result of the subtraction, forming the new count value. If an underflow did not result from the subtraction, the result of the subtraction is the new count value. The frequency of the generated timing signal is determined by the ratio of the subtrahend and preload values. This permits the generation of many different timing signals from a single fixed frequency. The architecture required to perform these operations is relatively simple and inexpensive.
REFERENCES:
patent: 3603773 (1971-09-01), Carlstein
patent: 4053879 (1977-10-01), Anderson
patent: 5222111 (1993-06-01), Muramatsu
Butler Dennis M.
Heckler Thomas M.
Hewlett--Packard Company
Penn Jonathan B.
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