Programmable processor and method with wide operations

Details Programmable processor and method with wide operations Programmable processor and method with wide operations

2007-11-27

2007-11-27

Chauhan, Ulka (Department: 2628)

Computer graphics processing and selective visual display system

Computer graphic processing system

Graphic command processing

C712S208000, C712S209000, C712S210000

Reexamination Certificate

active

10616303

ABSTRACT:
A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width and accessible number of general purpose registers.

REFERENCES:
patent: 4025772 (1977-05-01), Constant
patent: 4489393 (1984-12-01), Kawahara et al.
patent: 4658349 (1987-04-01), Tabata et al.
patent: 4658908 (1987-04-01), Hannukainen
patent: 4701875 (1987-10-01), Konishi et al.
patent: 4727505 (1988-02-01), Konishi et al.
patent: 4785393 (1988-11-01), Chu et al.
patent: 4814976 (1989-03-01), Hansen et al.
patent: 4852098 (1989-07-01), Brechard et al.
patent: 4875161 (1989-10-01), Lahti
patent: 4876660 (1989-10-01), Owens et al.
patent: 4893267 (1990-01-01), Alsup et al.
patent: 4949294 (1990-08-01), Wambergue
patent: 4953073 (1990-08-01), Moussouris et al.
patent: 4956801 (1990-09-01), Priem et al.
patent: 4959779 (1990-09-01), Weber et al.
patent: 4969118 (1990-11-01), Montoye et al.
patent: 4975868 (1990-12-01), Freerksen
patent: 5031135 (1991-07-01), Patel
patent: 5032865 (1991-07-01), Schlunt
patent: 5081698 (1992-01-01), Kohn
patent: 5113506 (1992-05-01), Moussouris et al.
patent: 5155816 (1992-10-01), Kohn
patent: 5157388 (1992-10-01), Kohn
patent: 5161247 (1992-11-01), Murakami et al.
patent: 5179651 (1993-01-01), Taaffe et al.
patent: 5201056 (1993-04-01), Daniel et al.
patent: 5208914 (1993-05-01), Wilson et al.
patent: 5231646 (1993-07-01), Heath et al.
patent: 5233690 (1993-08-01), Shelock et al.
patent: 5241636 (1993-08-01), Kohn
patent: 5268855 (1993-12-01), Mason et al.
patent: 5268995 (1993-12-01), Diefendorff et al.
patent: 5280598 (1994-01-01), Osaki et al.
patent: 5347643 (1994-09-01), Kondo et al.
patent: 5408581 (1995-04-01), Suzuki et al.
patent: 5412728 (1995-05-01), Besnard et al.
patent: 5423051 (1995-06-01), Fuller et al.
patent: 5426600 (1995-06-01), Nakagawa et al.
patent: 5430660 (1995-07-01), Hangeveld et al.
patent: 5471628 (1995-11-01), Phillips et al.
patent: 5481686 (1996-01-01), Dockser
patent: 5487024 (1996-01-01), Girardeau, Jr.
patent: 5500811 (1996-03-01), Corry
patent: 5508951 (1996-04-01), Ishikawa
patent: 5515520 (1996-05-01), Hatta et al.
patent: 5533185 (1996-07-01), Lentz et al.
patent: 5557724 (1996-09-01), Sampat et al.
patent: 5588152 (1996-12-01), Dapp et al.
patent: 5590365 (1996-12-01), Ide et al.
patent: 5592405 (1997-01-01), Gove et al.
patent: 5600814 (1997-02-01), Gahan et al.
patent: 5636351 (1997-06-01), Lee
patent: 5640543 (1997-06-01), Farrell et al.
patent: 5642306 (1997-06-01), Mennemeier et al.
patent: 5666298 (1997-09-01), Peleg et al.
patent: 5669010 (1997-09-01), Duluk, Jr.
patent: 5673407 (1997-09-01), Poland et al.
patent: 5675526 (1997-10-01), Peleg et al.
patent: 5680338 (1997-10-01), Agarwal et al.
patent: 5721892 (1998-02-01), Peleg et al.
patent: 5734874 (1998-03-01), Van Hook et al.
patent: 5740093 (1998-04-01), Sharangpani
patent: 5742840 (1998-04-01), Hansen et al.
patent: 5757432 (1998-05-01), Dulong et al.
patent: 5758176 (1998-05-01), Agarwal et al.
patent: 5768546 (1998-06-01), Kwon
patent: 5778412 (1998-07-01), Gafken
patent: 5802336 (1998-09-01), Peleg et al.
patent: 5809292 (1998-09-01), Wilkinson et al.
patent: 5818739 (1998-10-01), Peleg et al.
patent: 5819101 (1998-10-01), Peleg et al.
patent: 5825677 (1998-10-01), Agarwal et al.
patent: 5828869 (1998-10-01), Johnson et al.
patent: 5835782 (1998-11-01), Lin et al.
patent: 5881275 (1999-03-01), Peleg et al.
patent: 5886732 (1999-03-01), Humpleman
patent: 5887183 (1999-03-01), Agarwal et al.
patent: 5898849 (1999-04-01), Tran
patent: 5922066 (1999-07-01), Cho et al.
patent: 5983257 (1999-11-01), Dulong et al.
patent: 5996057 (1999-11-01), Scales, III et al.
patent: 6016538 (2000-01-01), Guttag et al.
patent: 6041404 (2000-03-01), Roussel et al.
patent: 6052769 (2000-04-01), Huff et al.
patent: 6092094 (2000-07-01), Ireton
patent: 6119216 (2000-09-01), Peleg et al.
patent: 6173393 (2001-01-01), Palanca et al.
patent: 6275834 (2001-08-01), Lin et al.
patent: 6295599 (2001-09-01), Hansen et al.
patent: 6401194 (2002-06-01), Nguyen et al.
patent: 6425073 (2002-07-01), Roussel et al.
patent: 6453368 (2002-09-01), Yamamoto
patent: 6516406 (2003-02-01), Peleg et al.
patent: 6539467 (2003-03-01), Anderson et al.
patent: 6567908 (2003-05-01), Furuhashi
patent: 6574724 (2003-06-01), Hoyle et al.
patent: 6631389 (2003-10-01), Lin et al.
patent: 6643765 (2003-11-01), Hansen et al.
patent: 6725356 (2004-04-01), Hansen et al.
patent: 1 323 451 (1993-10-01), None
patent: 0 654 733 (1994-05-01), None
patent: 0 468 820 (1992-01-01), None
patent: 0 651 321 (1995-05-01), None
patent: 0 654 733 (1995-05-01), None
patent: 0 657 804 (1995-06-01), None
patent: 0 766 169 (1997-04-01), None
patent: S60-217435 (1985-10-01), None
patent: 0 474 246 (1991-06-01), None
patent: 3268024 (1991-11-01), None
patent: 6095843 (1994-04-01), None
patent: WO 93/01565 (1993-01-01), None
patent: WO 93/11500 (1993-06-01), None
patent: WO 97/07450 (1997-02-01), None
IEEE Draft Standard for “Scalable Coherent Interface-Low-Voltage Differential Signal Specifications And Packet Encoding”, IEEE Standards Department, P1596.3/D0.15 (Mar. 1992).
IEEE Draft Standard for “High-Bandwidth Memory Interface Based on SCI Signaling Technology (RamLink)”, IEEE Standards Department, Draft 1.25 IEEE P1596.4-199X (May 1995).
IBM, “The PowerPC Architecture: A Specification For A New Family of Risc Processors”, 2nd Ed., Morgan Kaufmann Publishers, Inc. (1994).
Hewlett-Packard Co., “PA-RISC 1.1 Architecture and Instruction Set”, Manual Part No. 09740-90039, (1990).
MIPS Computer Systems, Inc., “MIPS R4000 User's Manual”, Mfg. Part No. M8-00040, (1990).
Parallel Computers for Graphics Applications, Adam Levinthal, Pat Hanrahan, Mike Paquette, Jim Lawson, Pixar San Rafael, California, 1987.
Organization of the Motorola 88110 Superscalar RISC Microprocessor, Keith Diefendorff and Michael Allen.
Microprocessor Report, vol. 7 No. 13, Oct. 4, 1993, IBM Regains Performance Lead with Power2, Six Way Superscalar CPU in MCM Achieves 126 SPECint92.
IBM Creates PowerPC Processors for AS/400, Two New CPU's Implement 64-Bit Power PC with Extensions by Linley Gwennap, Jul. 31, 1995.
The Visual Instruction Set (VIS) in UltraSPAR™, L. Kohn, G. Maturana, M. Tremblay, A. Prabhu, G. Zyner, May 3, 1995.
Osborne McGraw-Hill, i860™ Microprocessor Architecture, Neal Margulis, Foreword by Les Kohn.
A General-Purpose Array Processor for Seismic Processing, Nov.-Dec. 1984, vol. 1, No. 3) Revisiting past digital signal processor technology, Don Shaver- Jan.-Mar. 1998.
Accelerating Multimedia with Enhanced Microprocessors, Ruby B. Lee, 1995.
Ide, et al., “A 320-MFLOPS CMOS Floating-point Processing Unit for Superscalar Processors,” p. 12-21, Mar. 28, 1993, IEEE J. of Solid-State Circuits.
K. Uchiyama et al., The Gmicro/5OO Superscalar Microprocessor with. Branch Buffers, IEEE Micro, Oct. 1993, p. 12-21.
Ruby B. Lee, Realtime MPEG Video Via Software Decompression on a PA-RISC Processor, IEEE (1995).
Karl M. Guttag et. al. “The TMS34010: An Embedded Microprocessor”, IEEE Jun. 1988, p. 186-190.
M. Awaga et al., “The μVP 64-bit Vector Coprocessor: A New Implementation of High-Performance Numerical Computation”, IEEE Micro, vol. 13, No. 5, Oct. 1993, p. 24-36.
Tom Asprey et al., “Performance Features of the PA7100 Microprocessor”, IEEE Micro (Jun. 1993), p. 22-35.
Gove

Affiliated with

Also associated with

Rating

Programmable processor and method with wide operations does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Programmable processor and method with wide operations, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programmable processor and method with wide operations will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3831625