Programmable precision current controlling apparatus

Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion

Reexamination Certificate

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Reexamination Certificate

active

06750797

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of current sink and current source circuits. More specifically, embodiments of the present invention are directed to precision programmable current controlling devices.
BACKGROUND OF THE INVENTION
Programmable current sources are some of the most versatile components used in analog technology. They can be used in a variety of applications including analog computation, offset cancellation, parameter adjustment measurements, characterization of devices, driving actuators, and in Automatic Test Equipment (ATE).
In ATE applications, precise programmable current sources are necessary for precision parametric measurement units and integrated circuit quiescent current (IDDQ) measurements. The operating parameters in these applications necessitate precise current control, because the ATE system may be used as the reference for testing integrated circuits (ICs). Specifically, it has been known that manufacturing defects in the semiconductor fabrication process can be detected by precise measurement of current.
One of the most common implementations of a current source couples an operational amplifier, also referred to as an “mop-amp”, with a transistor and a resistor. The polarity of the output current distinguishes current sinks, current sources, and combined current sink/sources. A current sink draws current like a load and can only have current flowing in via its output pin. A current source can only have current flowing out of its output pin. A current sink/source may have current flowing into or flowing out of its output pin, that is, current may be measured as a negative or positive value.
FIG. 1
is a diagram of an exemplary prior art programmable current sink
100
. In
FIG. 1
, a reference voltage supply (REF)
101
is coupled with a digital-to-analog converter (DAC)
102
. The output of DAC
102
is coupled with the non-inverting input
110
of an op-amp
103
. The output of op-amp
103
is coupled with a resistor
105
through the gate of transistor
104
. In
FIG. 1
, the inverting input
111
of op-amp
103
is coupled with the source of transistor
104
. Op-amp
103
regulates the gate of transistor
104
so that the voltage drop across resistor
105
is essentially the same as the voltage output by DAC
102
. In other words, there is a 0 volts difference in potential between non-inverting input
110
and inverting input
111
. The reference voltage supplied by reference voltage supply
101
is regulated by DAC
102
according to the digital bit value to which it is set. Thus, a set voltage (V
SET
) is output from DAC
102
referenced to ground and which is used to regulate the amount of current flowing into current sink
100
via output pin
120
. The current flowing through resistor
105
can be derived by the equation:
I=V
prog
/R
where R is the resistance value of resistor
105
, V
prog
is the program voltage supplied by DAC
102
as seen across resistor
105
. The minimum output voltage for current sink
100
can be expressed by the equation:
V
out
(min)=
V
prog
+V
DS
(sat).
V
DS
(sat) is the saturation voltage of transistor
104
. If a high impedance load, connected to the output of current sink
100
, generates a voltage below V
out
(min) the current source will become unregulated. V
out
(min) is directly proportional to the programmed current and has an upper limit of:
V
out
(min)=
V
ref
+V
DS
(sat).
V
ref
is the maximum output voltage of DAC
102
which is bounded by its REF_LO, in this Figure tied to ground, and its REF_HI, in this Figure supplied by reference voltage supply
101
.
Current sinks of the types just described have had several problems and limitations associated with their use. For example, one drawback of system
100
is the limitation on output voltage as described above. One method for preventing the DAC from putting out voltages above a certain limit (e.g. V
ref
/2), is by limiting the use of the programming bits available to the DAC. However, this results in a reduction in resolution for this type of current sink.
A second possibility would be to reduce the reference Voltage V
ref
. Since errors due to noise, offset, and drift essentially stay the same, they may become significant in comparison to the desired output voltage. Thus the accuracy of the voltage output by DAC
102
is then determined by the error signals rather than least significant bit used to program the DAC. Thus the ability of the prior art as shown in current sink
100
to precisely control current is limited in applications requiring low output voltage.
FIG. 2
shows an exemplary prior art implementation of an automatic test equipment system
200
. A digital signal processor (DSP)
202
is coupled with an analog to digital converter (ADC)
201
and with a plurality of digital to analog converters
102
. DSP
202
reads data from ADC
201
and sends digital signals to the DACs which are used to control the output from the DACs. Typically, automatic test systems are used to perform parametric testing of integrated circuits. This necessitates precise control of current and voltage in order to obtain accurate test results and to prevent damage to the circuits being tested.
As mentioned above, the program voltage can be lowered by limiting the number of programming bits used by DAC
102
. For example, DSP
202
can send digital signals to DAC
102
that only cause DAC
102
to utilize
4
of its programming levels. While this can effectively limit the voltage output from DAC
102
, it also reduces the dynamic range of the DAC and limits the ability to precisely control current in some applications.
The exemplary prior art of
FIG. 1
can also be reconfigured as shown in
FIG. 3
to create a current source. In
FIG. 3
, a reference voltage supply (REF)
304
is coupled with a digital-to-analog converter (DAC)
303
. The output of DAC
303
is coupled with the non-inverting input of an op-amp
302
. The output of op-amp
302
is coupled with a resistor
305
through the gate of transistor
306
. In
FIG. 3
, the inverting input of op-amp
302
is coupled with the source of transistor
306
.
The reference voltage supplied by reference voltage supply
304
is regulated by DAC
303
according the digital bit value to which it is set. The output current is driven by the reference voltage supplied by reference voltage supply
304
. The feedback to the inverting input of op-amp
302
adjusts the gate voltage so that the sensed voltage matches the output of the DAC.
V
DS
(sat) is the saturation voltage of transistor
306
. V
ref
is the maximum output voltage of DAC
303
which is bounded by its REF_HI. One drawback to the current source design of
FIG. 3
is that the current range desired by entering the highest values of binary code to the DAC may be unreachable. For example, the maximum value of V
ref
output by the DAC may not be applied across the resistor
305
because there is necessarily a voltage across the transistor
306
. This translates into a negative output voltage which might not be tolerable by the load. Thus, the maximum I
out
current represented by setting the DAC to its full limit is not attainable.
FIG. 4
is a diagram of an exemplary current sink/source. Current sink/source
400
exhibits the same limitations as current sink
100
of
FIG. 1
with respect to low output voltage (e.g., susceptibility to error and loss of resolution). In addition, another problem of the prior art is that to provide both current sink and current source capability, DAC
403
must provide both positive voltage when acting as a current source and a negative voltage when acting as a current sink or vice versa. Each programming bit of the DAC
403
now controls twice as much voltage, thus further aggravating the loss of resolution due to the unavailability of the highest order bits and reducing the precision with which current can be controlled. Alternatively, to realize the same level of precision as the current sink of
FIGS. 1
,
2
DACs or a 2 output DAC (e.g., DAC
403
of
FIG. 4
) are ne

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