Programmable pin for use in programmable logic devices

Details Programmable pin for use in programmable logic devices Programmable pin for use in programmable logic devices

1993-03-05

1994-05-31

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307468, 364716, H03K 19173

Patent

active

053172116

ABSTRACT:
A buffer circuit for programming an I/O pin of a programmable logic device to function either as a normal I/O site, a power pin, or a ground pin has been provided. The I/O pin may be programmed by a user by simply placing first and second control signals in appropriate logic states. The buffer circuit also includes a tri-state circuit for providing tri-state outputs when functioning as a normal I/O site.

REFERENCES:
patent: 4612459 (1986-09-01), Pollachek
patent: 4721868 (1988-01-01), Cornell
patent: 4835414 (1989-05-01), Friedin
patent: 4992679 (1991-02-01), Takata
patent: 5017813 (1991-05-01), Galbraith
patent: 5027315 (1991-06-01), Agrawal
patent: 5175859 (1992-12-01), Miller
patent: 5237218 (1993-08-01), Josephson

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