Programmable phase shift and duty cycle correction circuit...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Rectangular or pulse waveform width control

Reexamination Certificate

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Details

C327S176000

Reexamination Certificate

active

07138841

ABSTRACT:
A phase shift and duty cycle correction circuit is disclosed herein as comprising a programmable digital to analog converter (DAC), a storage device (e.g., a capacitor), a charge sub-circuit and dump sub-circuit for charging and discharging the storage device, respectively, a comparator, and a clock driver circuit. A linearly increasing (or ramped) voltage waveform is generated within the storage device by the charging and discharging actions of the charge and dump sub-circuits; a periodic process which is controlled by opposite phases of the input clock. By programming the DAC control input to change the slicing threshold of the ramped waveform, the circuit and method described herein provides a means for programmable phase shifting and duty cycle correction.

REFERENCES:
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Efendovich et al., “Multifrequency Zero-Jitter Delay-Locked Loop,” IEEE Journal of Solid-State Circuits, vol. 29, No. 1, Jan. 1994, pp. 67-70.

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