Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate
2005-08-02
2005-08-02
Nguyen, Linh My (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
C327S156000
Reexamination Certificate
active
06924678
ABSTRACT:
A phase-locked loop (“PLL”) for use in a programmable logic device (“PLD”) is constructed with modular components, which may be digital, and which may be programmable or adjustable, in place of the conventional analog charge pump and loop filter. Connections are provided between those components and the remainder of the PLD so that if the PLL is not being used in a particular user design of the PLD, the PLL modular components may be used by other portions of the PLD. Similarly, those connections allow other portions of the PLD to be used in place of one or more of the modular components where more complex or special filtering than can be provided by the modular components is required.
REFERENCES:
patent: 3473160 (1969-10-01), Wahlstrom
patent: 4494021 (1985-01-01), Bell et al.
patent: 4633488 (1986-12-01), Shaw
patent: 4719593 (1988-01-01), Threewitt et al.
patent: 4857866 (1989-08-01), Tateishi
patent: 4868522 (1989-09-01), Popat et al.
patent: 4959646 (1990-09-01), Podkowa et al.
patent: 5072195 (1991-12-01), Graham et al.
patent: 5075575 (1991-12-01), Shizukuishi et al.
patent: 5079519 (1992-01-01), Ashby et al.
patent: 5121014 (1992-06-01), Huang
patent: 5133064 (1992-07-01), Hotta et al.
patent: 5204555 (1993-04-01), Graham et al.
patent: 5208557 (1993-05-01), Kersh
patent: 5239213 (1993-08-01), Norman et al.
patent: 5349544 (1994-09-01), Wright et al.
patent: 5394116 (1995-02-01), Kasturia
patent: 5397943 (1995-03-01), West et al.
patent: 5418499 (1995-05-01), Nakao
patent: 5420544 (1995-05-01), Ishibashi
patent: 5424687 (1995-06-01), Fukuda
patent: 5448191 (1995-09-01), Meyer
patent: 5477182 (1995-12-01), Huizer
patent: 5506878 (1996-04-01), Chiang
patent: 5542083 (1996-07-01), Hotta et al.
patent: 5581214 (1996-12-01), Iga
patent: 5629651 (1997-05-01), Mizuno
patent: 5642082 (1997-06-01), Jefferson
patent: 5646564 (1997-07-01), Erickson et al.
patent: 5656959 (1997-08-01), Chang et al.
patent: 5691669 (1997-11-01), Tsai et al.
patent: 5699020 (1997-12-01), Jefferson
patent: 5742180 (1998-04-01), DeHon et al.
patent: 5744991 (1998-04-01), Jefferson et al.
patent: RE35797 (1998-05-01), Graham et al.
patent: 5777360 (1998-07-01), Rostoker et al.
patent: 5815016 (1998-09-01), Erickson
patent: 5847617 (1998-12-01), Reddy et al.
patent: 5889436 (1999-03-01), Yeung et al.
patent: 5900757 (1999-05-01), Aggarwal et al.
patent: 5952891 (1999-09-01), Boudry
patent: 5963069 (1999-10-01), Jefferson et al.
patent: 5970110 (1999-10-01), Li
patent: 5974105 (1999-10-01), Wang et al.
patent: 5987543 (1999-11-01), Smith
patent: 5999025 (1999-12-01), New
patent: 6014048 (2000-01-01), Talaga, Jr. et al.
patent: 6043677 (2000-03-01), Albu et al.
patent: 6069506 (2000-05-01), Miller, Jr. et al.
patent: 6069507 (2000-05-01), Shen et al.
patent: 6104222 (2000-08-01), Embree
patent: 6114915 (2000-09-01), Huang et al.
patent: 6141394 (2000-10-01), Linebarger et al.
patent: 6144242 (2000-11-01), Jeong et al.
patent: 6157266 (2000-12-01), Tsai et al.
patent: 6249189 (2001-06-01), Wu et al.
patent: 6252419 (2001-06-01), Sung et al.
patent: 6278332 (2001-08-01), Nelson et al.
patent: 6320469 (2001-11-01), Friedberg et al.
patent: 6373278 (2002-04-01), Sung et al.
patent: 6411150 (2002-06-01), Williams
patent: 6448820 (2002-09-01), Wang et al.
patent: 6462623 (2002-10-01), Horan et al.
patent: 6483886 (2002-11-01), Sung et al.
patent: 6690224 (2004-02-01), Moore
patent: 6718477 (2004-04-01), Plants et al.
patent: 2001/0033188 (2001-10-01), Aung et al.
patent: 0 266 065 (1988-05-01), None
patent: 0 416 930 (1991-03-01), None
patent: 0 778 517 (1997-06-01), None
patent: 0 987 822 (2000-03-01), None
patent: 1 056 207 (2000-11-01), None
patent: 1-137646 (1989-05-01), None
patent: 10215156 (1998-08-01), None
Advanced Micro Devices, Inc., “Am2971 Programmable Event Generator (PEG),” Publication No. 05280, Rev. C, Amendment /0, pp. 4-286-4-303 (Jul. 1986).
Advanced Micro Devices, Inc., “AmPAL*23S8 20-Pin IMOX PAL-Based Sequencer,” Publication No. 06207, Rev. B, Amendment /0, pp. 4-102-4-121 (Oct. 1986).
Agere Systems, Inc., “ORCA ORT82G5 0.622/1.0-1.25/2.0-2.5/3.125 Gbits/s Backplane Interface FPSC,” Preliminary Data Sheet, pp. 1-35 (Jul. 2001).
Agere Systems, Inc., “ORCA 8850 Field-Programmable System Chip (FPSC) Eight Channel × 850 Mbits/s Backplane Transceiver,” Product Brief, pp. 1-6 (Jul. 2001).
Agere Systems, Inc., “ORCA 8850 Field-Programmable System Chip (FPSC) Eight Channel × 850 Mbits/s Backplane Transceiver,” Product Brief, pp. 1-36 (Aug. 2001).
DynaChip Corp., DY6000 Family Datasheet (Dec. 1998).
Ko, U., et al., “A 30-ps Jitter, 3.6 μs Locking, 3.3-Volt Digital PLL for CMOS Gate Arrays,”Proceedings of the IEEE 1993 Custom Integrated Circuits Conference, Publication No. 0-7803-0826-3/93, pp. 23.3.1-23.3.4 (May 9-12, 1993).
LSI Logic Corp., 500K Technology Design Manual (Document DB04-000062-00, First Edition), pp. 8-1-8-33 (Dec. 1996).
Lucent Technologies, Inc., Optimized Reconfigurable Cell Array (ORCA®) OR3Cxxx/OR3Txxx Series Field-Programmable Gate Arrays, Preliminary Product Brief, (Nov. 1997).
Lucent Technologies, Inc., ORCA® Series 3 Field-Programmable Gate Arrays, Preliminary Data Sheet, Rev. 01 (Aug. 1998).
Monolithic Memories, Inc., “Programmable Array Logic PAL20RA10-20 Advance Information,” pp. 5-95-5-102 (Jan. 1988).
National Semiconductor Corp.,LVDS Owner's Manual&Design Guide(Apr. 25, 1997).
National Semiconductor Corp., “DS90CR285/DS90CR286 +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-66 MHZ,” (Mar. 1998).
Xilinx, Inc., Virtex 2.5V Field Programmable Gate Arrays Advance Product Specification (Version 1.0) (Oct. 20, 1998).
Xilinx, Inc., Application Note: Using the Virtex Delay-Locked Loop (Version 1.31) (Oct. 21, 1998).
Zaks, R., et al.,From Chips to Systems: An Introduction to Microcomputers, pp. 54-61 (Prentice-Hall, Inc., Englewood Cliffs, N.J., 1987).
Altera Corporation
Fish & Neave IP Group of Ropes & Gray LLP
Ingerman Jeffrey H.
Nguyen Linh My
LandOfFree
Programmable phase-locked loop circuitry for programmable... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Programmable phase-locked loop circuitry for programmable..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programmable phase-locked loop circuitry for programmable... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3515703