Programmable oscillator with power down feature and frequency ad

Details Programmable oscillator with power down feature and frequency ad Programmable oscillator with power down feature and frequency ad

1983-11-14

1985-08-20

Grimm, Siegfried H.

Oscillators

Ring oscillators

307297, 331111, 331173, H03K 3354

Patent

active

045367205

ABSTRACT:
A programmable oscillator is provided for use on an integrated circuit chip. The oscillator includes a plurality of inverter delay stages connected in tandem between an input and an output node. A single FET device couples a node common to all of the inverter delay stages to a ground potential. Another FET device controls the input node. When a logic enabling signal is appropriately applied to the FET devices, the oscillator is controlled so that internal nodes of the oscillator float high when it is off and no energy is dissipated. In addition, the amount of delays between the delay stages and the input stage of the load is such that the load supplies the greater ratio of delays. This ensures that the oscillator's frequency of oscillation tracks the switching speed of the load.

REFERENCES:
patent: 3978431 (1976-08-01), Lattin
patent: 4072910 (1978-02-01), Dingwall et al.
patent: 4357581 (1982-11-01), Higuchi
patent: 4388536 (1983-06-01), Peil et al.
patent: 4438346 (1984-03-01), Chuang et al.

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