Programmable memory with memory cells programmed by addressing

Static information storage and retrieval – Read only systems – Semiconductive

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365 96, 365189, G11C 1700

Patent

active

047275146

ABSTRACT:
A programmable memory includes a memory matrix (34) with a row decode circuit (36) and a column decode circuit (48) operable in the program mode to select one of the memory elements in the memory matrix (34). A current boost circuit (50) is operable to provide increased current to the selected cell such that selection of the cell opens the fuse associated therewith to change the logic state. The pins associated with the column and row addresses have multiple mode functions such that in the normal operating mode they can be assigned other tasks and in the programming mode are utilized primarily for addressing of the memory cells.

REFERENCES:
patent: 4130889 (1978-12-01), Chua
patent: 4347584 (1982-08-01), Fukushima et al.
patent: 4385368 (1983-05-01), Principi et al.
patent: 4646264 (1987-02-01), Matsuzaki

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