Programmable memory device with an improved redundancy...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S189070, C365S200000

Reexamination Certificate

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11181364

ABSTRACT:
An electrically programmable memory device is proposed including: a matrix of memory cells arranged in a plurality of memory arrays and at least one redundancy array; and a substituting structure that substitutes the use of each memory array with the use of one of the at least one redundancy array in response to a failure of the memory array, wherein the memory arrays are grouped into at least one set. The substituting structure includes: a structure for associating each set with a predetermined one of the at least one redundancy array; a flag for each memory array indicative of the failure of the memory array; and a selecting for enabling each memory array or the associated redundancy array according to the corresponding flag.

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patent: 1 357 559 (2003-10-01), None
patent: 1 365 419 (2003-11-01), None

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