Programmable memory device that supports multiple operational mo

Details Programmable memory device that supports multiple operational mo Programmable memory device that supports multiple operational mo

1997-09-25

1999-02-02

Nelms, David

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

365120, G11C 800

Patent

active

058674446

ABSTRACT:
A programmable memory device including a register that stores a programmable mode select bit, a data input, a control input and decode circuitry that decodes the mode select bit to determine whether the memory device operates in either a check mode or a mask mode. The control input receives at least one control bit for each data byte received by the memory device during a write operation or cycle. The function of the control bit(s) depends upon the mode select bit. In a check mode of operation, each control bit functions as a parity/check bit for a corresponding data byte, where the memory device stores the check bit with its corresponding data byte during each write cycle. In the mask mode of operation, each control bit functions as a mask bit for a corresponding data byte, where the memory device selectively stores or masks the data byte depending upon the state of the corresponding mask bit.

REFERENCES:
patent: 5267204 (1993-11-01), Ashmore, Jr.
patent: 5539696 (1996-07-01), Patel
patent: 5737761 (1998-04-01), Holland et al.

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