Programmable memory controller for power and noise reduction

Details Programmable memory controller for power and noise reduction Programmable memory controller for power and noise reduction

1995-04-13

1997-04-15

Nelms, David C.

Static information storage and retrieval

Hardware for storage elements

365226, 36523008, G11C 502

Patent

active

056216785

ABSTRACT:
A memory controller circuit for use in a computer system provides memory address and control signals to a single in-line memory module (SIMM) connector. The SIMM connector can hold a SIMM that has dynamic random access memories (DRAMs) mounted on one or both sides. The SIMM connector provides a channel of signals to both sides of the SIMM. A driver associated with each channel receives a memory address and control signal. Each driver either drives a buffered memory signal to the associated channel or is placed in a high impedance state, depending upon whether a SIMM is in the SIMM connector. If a SIMM is in the connector, the driver associated with one of the channels is placed in the high impedance state if it is determined that the SIMM is single-sided. A programmable disabling means provides a driver enable signal to each driver. When the driver enable signal is asserted, the corresponding driver is in an enabled state. A deasserted driver enable signal places the corresponding driver in a disabled state. The programmable disabling means can be programmed to selectively assert and deassert the driver enable signals, and, consequently, to enable and disable the corresponding drivers in response to whether a SIMM, single or double-sided, is present in the SIMM connector.

REFERENCES:
patent: 5241643 (1993-08-01), Durkin et al.

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