Programmable memory controller and data terminal equipment

Details Programmable memory controller and data terminal equipment Programmable memory controller and data terminal equipment

1994-11-10

1997-12-02

Tung, Kee M.

Computer graphics processing and selective visual display system

Display driving control circuitry

Controlling the condition of display elements

395503, 395513, 345197, 3642384, G06F 1316

Patent

active

056945850

ABSTRACT:
A programmable memory controller includes a plurality of multi-bit registers, with each multi-bit register coupled to a cycle generator. Each cycle generator is formed from a multi-bit shift register and control signals which drive each multi-bit shift register so that data in an associated multi-bit register is shifted through the shift register to form desired memory control pulses.

REFERENCES:
patent: 5001652 (1991-03-01), Thompson
patent: 5301278 (1994-04-01), Bowater et al.
patent: 5307320 (1994-04-01), Farrer et al.
patent: 5418924 (1995-05-01), Dresser
patent: 5522064 (1996-05-01), Aldereguia et al.
Morton H. Lewin, Logic Design and Computer Organization, Addison-Wesley Publishing Co., 1983, pp. 57-62, 126-134.

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