Programmable logic storage element for programmable logic device

Details Programmable logic storage element for programmable logic device Programmable logic storage element for programmable logic device

1985-04-12

1987-06-30

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307445, 364716, H03K 19177

Patent

active

046773185

ABSTRACT:
A storage element for use in a logic array including a flip-flop device and a complex logic circuit interconnected in such a way that the output of the complex logic circuit is an input to the flip-flop. A Toggle Flip-Flop Control (TFFC) signal, an invert control (INV) signal, and a clock (CLK) signal are also inputs to the complex logic circuit. The output of the flip-flop connects to an output pad, an internal direct feedback line which is one of the means by which the flip-flop is connected to the comples logic circuit, and an external feedback bus which leads back to an associated AND-OR array. The inptu to the complex logic circuit is generated by the standard AND-OR array which is programmable to some degree.

REFERENCES:
patent: 4034356 (1977-07-01), Howley et al.
patent: 4422072 (1983-12-01), Cavlan
patent: 4433331 (1984-02-01), Kollaritsch
patent: 4525641 (1985-06-01), Cruz et al.
Elliott et al., "Array Logic Processing"; IBM-TDB; vol. 16, No. 2, pp. 586-587; 7/1973.
Eggebrecht et al., "Programmable Logic Array with Provision for Interrupts"; IBM-TDB; vol. 20, No. 2, pp. 745-746; 7/1977.
Andres, "MOS Programmable Logic Arrays", A Texas INstruments Application Report; No. CA-158, 10/1970.

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