Programmable logic devices with improved content addressable mem

Static information storage and retrieval – Associative memories – Ferroelectric cell

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G11C 1500

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active

061445738

ABSTRACT:
A programmable logic array integrated circuit device includes regions of programmable logic, regions of memory, and a programmable network of interconnection conductors for selectively conveying signals to, from, and between the regions of logic and memory. The memory regions are usable as content addressable memory. Circuitry is provided for facilitating programming of the memory in content addressable mode.

REFERENCES:
patent: Re34363 (1993-08-01), Freeman
patent: 3473160 (1969-10-01), Wahlstrom
patent: 3849638 (1974-11-01), Greer
patent: 4740917 (1988-04-01), Denis et al.
patent: 4876466 (1989-10-01), Kondou et al.
patent: 4912345 (1990-03-01), Steele et al.
patent: 4975601 (1990-12-01), Steele
patent: 5027011 (1991-06-01), Steele
patent: 5099150 (1992-03-01), Steele
patent: 5121006 (1992-06-01), Pedersen
patent: 5128559 (1992-07-01), Steele
patent: 5144582 (1992-09-01), Steele
patent: 5226005 (1993-07-01), Lee et al.
patent: 5270587 (1993-12-01), Zagar
patent: 5282163 (1994-01-01), Shibata
patent: 5302865 (1994-04-01), Steele et al.
patent: 5319589 (1994-06-01), Yamagata et al.
patent: 5339268 (1994-08-01), Machida
patent: 5362999 (1994-11-01), Chiang
patent: 5383146 (1995-01-01), Threewitt
patent: 5386155 (1995-01-01), Steele et al.
patent: 5408434 (1995-04-01), Stansfield
patent: 5450608 (1995-09-01), Steele
patent: 5473267 (1995-12-01), Stansfield
patent: 5532957 (1996-07-01), Malhi
patent: 5557218 (1996-09-01), Jang
patent: 5559747 (1996-09-01), Kasamizugami et al.
patent: 5574930 (1996-11-01), Halverson, Jr. et al.
patent: 5689195 (1997-11-01), Cliff et al.
patent: 5809281 (1998-09-01), Steele et al.
patent: 5815726 (1998-09-01), Cliff
patent: 5844854 (1998-12-01), Lee
patent: 5936873 (1999-08-01), Kongetira
patent: 5940852 (1999-08-01), Rangasayee et al.
C. Barre, "L'utilisation du FPLA; Evaluez les Applications d'un Composant Puissant qui se Reveler tres Economique", Electronique & Applications Industrielles, EAI 250, Apr. 1, 1978, pp. 21-25.
D. Bursky, "Combination RAM/PLD Opens New Application Options", Electronic Design, May 23, 1991, pp. 138-140.
"iFX8160 10ns FLEXlogic FPGA with SRAM Option; Advance Information", Intel Corporation, Oct. 1993, pp. 2-47 through 2-56.
"IFX780 10ns FLEXlogic FPGA with SRAM Option; Preliminary", Intel Corporation, Nov. 1993, Order No. 290459-004, pp. 2-24 through 2-46.
T. K-K. Ngai, "An SRAM-Programmable Field-Reconfigurable Memory", Master of Applied Science degree thesis submitted to the Department of Electrical Engineering of the University of Toronto, 1994.
A. Stansfield et al., "The Design of a New FPGA Architecture", Proceedings Field Programmable Logic (FPL) 1995, Springer Lecture Notes in Computer Science 975, pp. 1-14.
A. Kaviani et al., "Hybrid FPGA Architecture", Proceedings 4th International Symposium on FPGAs (FPGA 96), Feb. 1996.
"Next Generation FPGAs; Xilinx Next Generation FPGAs Deliver World-Class Performance", The Power of Innovation 1997, Xilinx, Inc., San Jose, CA, p. 7-7.
"Altera Enables System-Level Integration with Raphael Family of Embedded PLDs", Altera Corporation, San Jose, California, Aug. 31, 1998.
"Apex 20K Programmable Logic Device Family; Advance Product Brief", Altera Corporation, San Jose, California, Oct. 1998, pp. 1, 2, and 9.
"Altera Unveils New Name for Raphael: Advanced Programmable Embedded Matrix (APEX)", Altera Corporation, San Jose, California, Oct. 7, 1998.
"Apex 20K Device Family; Breakthrough MultiCore Architecture", Altera Corporation, San Jose, California, after Aug. 31, 1998.
F. Heile et al., "Hybrid Product Term and LUT Based Architecture Using Embedded Memory Blocks", Proceedings of FPGA 1999 Conference, Feb. 21-23, 1999, Monterey, California.

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