Programmable logic device with logic signal delay compensated cl

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

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327158, G06F 110

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active

061278653

ABSTRACT:
An integrated circuit programmable logic device comprising: a plurality of programmable logic elements that are responsive to clock signals; a clock signal generation circuit which produces a first clock signal; a first phase shifting element which produces a second clock signal which is a phase-shifted version of the first clock signal, shifted in phase by an amount which compensates for a logic signal delay; and a clock signal distribution network which distributes the first and second clock signals among the programmable logic elements.

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Steinke, G., "Using PLL Technology In A Programmable Logic Device," Electronic Design, pp. 123-134, (Jul. 7, 1997).

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