Programmable logic device incorporating a tristateable logic arr

Details Programmable logic device incorporating a tristateable logic arr Programmable logic device incorporating a tristateable logic arr

1998-06-19

2000-02-22

Nelms, David

Static information storage and retrieval

Addressing

Plural blocks or banks

36523008, G11C 800

Patent

active

060288094

ABSTRACT:
The invention relates to an integrated circuit. The integrated circuit can be a programmable logic device that incorporates a multi-function block having a plurality of integrally connected function units where at least one of the function units within the multi-function block is a tristate logic unit. The programmable logic device also includes a tristate bus operatively connected to the tristate logic unit that can supply tristate logic signals to the tristate bus as well as receive tristate logic signals from the tristate bus. The tristate bus carries tristate data signals and address select signals that operate to select a desired one of the tristate logic units within the programmable logic device.

REFERENCES:
patent: 4146749 (1979-03-01), Pepping et al.
patent: 5550782 (1996-08-01), Cliff et al.
Bursky, Dave, "Combination RAM/PLD Opens New Application Options", Electronic Design, pp. 138-140, May 23, 1991.
Intel Corporation "10 ns Flexlogic FPGA with SRAM Option", Intel.sup..RTM., iFX780, pp. 2-24 2-46, Nov. 1993.
NGAI, Tony Kai-Kit, "An SRAM-Programmable Field-Reconfigurable Memory", Department of Electrical Engineering, University of Toronto, Thesis for Master of Applied Science, 1994.
Altera Corporation APEX 20K Programmable Logic Device Family, ALTERA.RTM., Oct. 1998, ver. 1.

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