Programmable logic device having nonvolatile memory with...

Static information storage and retrieval – Powering – Conservation of power

Reexamination Certificate

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C365S226000, C365S156000, C326S039000

Reexamination Certificate

active

06853603

ABSTRACT:
A programmable logic device includes a memory with user selectable power consumption. During configuration, the memory operates at a relatively high power consumption level and quickly outputs configuration information. During normal operation, the memory selectively operates at the high power level or at a lower power level. The lower power level provides a lower rate of memory access than the high power level. The lower power level may be selected when the user desires to power other areas of the programmable logic device or when the user desires a lower rate of memory access. In this manner, a single memory can serve multiple functions without consuming an excessive amount of power.

REFERENCES:
patent: 5357458 (1994-10-01), Yu et al.
patent: 6442698 (2002-08-01), Nizar
Altera, MAX 7000, Programmable Logic Device Family, Jun. 2003, ver. 606, Data Sheet, pp. 1-66 (Altera Corporation, 101 Innovation Drive, San Jose CA 95134) (see pp. 20-21).
Altera, MAX 9000, Programmable Logic Device Family, Jun. 2003, ver. 6.5, Data Sheet, pp. 1-46 (Altera Corporation, 101 Innovation Drive, San Jose, CA 95134) (see p. 26).

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