Programmable logic device circuit and method of fabricating...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185050, C365S185330

Reexamination Certificate

active

06856542

ABSTRACT:
A programmable logic device (PLD) and method for fabricating the PLD are disclosed. The PLD includes an array of PLD cells. Each PLD cell may include a programmable transistor and a select transistor. The PLD array is divided into at least one first area and at least one second area adjacent the at least one first area. The at least one first area includes the programmable transistors and the at least one second area includes the select transistors.

REFERENCES:
patent: 4761768 (1988-08-01), Turner et al.
patent: 4833646 (1989-05-01), Turner
patent: 4912677 (1990-03-01), Itano et al.
patent: 5574857 (1996-11-01), Ramakrishnan et al.
patent: 5982683 (1999-11-01), Watson et al.
patent: 6282122 (2001-08-01), Sansbury

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