Boots – shoes – and leggings
Patent
1992-06-08
1994-12-27
Trans, Vincent N.
Boots, shoes, and leggings
364488, 364716, 34082583, 326 39, G06F 1560, H03K 17693
Patent
active
053771230
ABSTRACT:
A programmable logic device includes means for operating a computing element to compile a set of state-machine states in an incompletely specified state-machine. The state-machine states are compiled into a set of cellular array states in a rectilinear format of columns and rows. Multiple memory cells are located on a main diagonal. Function cells are located removed from the main diagonal for transferring information between the memory cells. Compatible sets of sequences are formed of sequences which have non-equal effect. Compatible sets are processed to form a closed cover. A distinct memory cell is then assigned to each compatible set constituting that closed cover. The closed cover can be formed selectively by having a compatible set consist of either a single entry of one sequence, two or more sequences, being at least a pair of sequences, a maximal compatible set or less than maximal compatible set from a pair of compatibles. Moreover, the compatible set could be a prime compatible set or less than prime compatible set being derived from maximal or less than maximal compatible sets. The closed cover tree contains every sequence which does not have equal effect on the internal states of the state-machine. Each implication set corresponding to a compatible set which constitutes the tree is contained as a subset of at least one compatible set.
REFERENCES:
patent: 3473160 (1969-10-01), Wahlstrom
patent: 3619583 (1971-11-01), Arnold
patent: 3731073 (1973-05-01), Noylan
patent: 3855536 (1974-12-01), Neuner
patent: 3987286 (1976-10-01), Muehldorf
patent: 4215401 (1980-07-01), Holsztynski et al.
patent: 4293783 (1981-10-01), Patil
patent: 4450520 (1984-05-01), Hollaar et al.
patent: 4504904 (1985-03-01), Moore et al.
patent: 4541071 (1985-09-01), Ohmori
patent: 4574394 (1987-03-01), Holstzynski et al.
patent: 4591980 (1986-05-01), Huberman et al.
patent: 4677587 (1987-06-01), Zemany, Jr.
patent: 4694411 (1987-09-01), Burrows
patent: 4697241 (1987-09-01), Lavi
patent: 4703435 (1987-10-01), Darringer
patent: 4709327 (1987-11-01), Hillis et al.
patent: 4727493 (1988-02-01), Taylor, Jr.
patent: 4758745 (1988-07-01), Elgamal et al.
patent: 4758953 (1988-07-01), Morita
patent: 4791602 (1988-12-01), Resnick
patent: 4792909 (1988-12-01), Serlet
patent: 4814973 (1989-03-01), Hillis
patent: 4839851 (1989-07-01), Maki
patent: 4845633 (1989-07-01), Furtek
patent: 4855903 (1989-08-01), Carleton et al.
patent: 4918440 (1990-04-01), Furtek
patent: 4963768 (1990-10-01), Agrawal et al.
patent: 5070446 (1991-12-01), Salem
patent: 5189628 (1993-02-01), Olsen et al.
patent: 5222030 (1993-06-01), Dongelo et al.
patent: 5231588 (1993-09-01), Shoji et al.
patent: 5255203 (1993-10-01), Agrawal et al.
George H. Williams, "Array State Assignments in Sequential Circuit Synthesis" (Ph.D. Dissertation, Engineering, Electrical) Yale University Press, 1970.
Monroe M. Newborn, Thomas F. Arnold, "Universal Modules for Bounded Signal Fan-Out Synchronous Sequential Circuits," IEEE (vol. C-21, No. 1, Jan., 1972).
Hyman, E., "Minimal Complexity Universal Cellular Arrays", Ph.D. A Dissertation, University of Southern California (Jan. 1974).
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