Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1991-04-01
1992-06-09
Hudspeth, David
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307443, 307481, H03K 19177
Patent
active
051210053
ABSTRACT:
A programmable logic array operates with a single clock signal frequency which delays a control signal allowing time for the input signals to reach steady state on the column conductors of the AND-plane before enabling an active pull-up circuit to latch those column conductors left floating by the input signals. The control signal for the active pull-up circuit of the OR-plane is also delayed allowing time for the signals on the column conductors and row conductors of the OR-plane to reach steady state and provide glitch-free output signals. The propagation paths for the control signals are made slower than the worst case data path through the AND-plane and OR-plane to eliminate race conditions.
REFERENCES:
patent: 4577190 (1986-03-01), Law
patent: 4697105 (1987-09-01), Moy
patent: 4740721 (1988-04-01), Chung et al.
patent: 4760290 (1988-07-01), Martinez
patent: 4764691 (1988-08-01), Jochem
patent: 4769562 (1988-09-01), Ghisio
patent: 4831285 (1989-05-01), Gaiser
patent: 4959646 (1990-09-01), Podkowa et al.
patent: 4990801 (1991-02-01), Caesar et al.
Atkins Robert D.
Hudspeth David
Motorola Inc.
LandOfFree
Programmable logic array with delayed active pull-ups on the col does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Programmable logic array with delayed active pull-ups on the col, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programmable logic array with delayed active pull-ups on the col will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1806810