Programmable logic array using single transistor to generate tru

Details Programmable logic array using single transistor to generate tru Programmable logic array using single transistor to generate tru

1987-10-27

1989-08-01

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307303, 307468, H03K 19177

Patent

active

048535621

ABSTRACT:
For reduction in occupation area, there is provided a programmable logic array circuit fabricated on a seminconductor substrate comprising (a) a plurality of true signal lines arranged in rows, (b) a plurality of complementary signal lines each intervening between adjacent two of the true signal lines, (c) a plurality of product term lines arranged in columns, (d) a first source of constant voltage supplying a first constant voltage level to the product term lines, (e) a second source of constant voltage producing a second constant voltage level different from the first constant voltage level, and (f) a plurality of active device areas each located under that area defined by one of the true signal lines, one of the complementary signal lines adjacent to aforesaid one of the true signal lines and adjacent two of the product term lines, and each of the active device area has two field effect transistors gate electrodes of which can be connected to either of the true signal line and the complementary signal line, then each active device area is expected to provide source and drain regions for only two field effect transistors.

REFERENCES:
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patent: 4384345 (1983-05-01), Mikome
patent: 4409499 (1983-10-01), Zapisek et al.
patent: 4467439 (1984-08-01), Rhodes
Kraft et al., "Method of Personalizing Programmed Logic Arrays Using Multiple Levels of Polysilicon", IBM T. D. B., vol. 23, No. 3, 8-1980, pp. 881-882.
Balasubramanian et al., "Program Logic Array With Metal Level Personalization", IBM T. D. B., vol. 19, No. 6, 11-1976, pp. 2144-2145.
Rideout, "Logic Arrays With Polysilicon Gate Lines", IBM T. D. B., vol. 19, No. 6, 11-1976, pp. 2262-2265.
Andres, "MOS Programmable Logic Arrays", Texas Instruments Application Report, 9-1974, pp. 1-4.

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