Programmable logic array having a changeable logic structure

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307451, 307469, 364716, G06F 738, H03K 19094

Patent

active

048764663

ABSTRACT:
Programmable Logic Array PLA) cells are arranged at intersections of input lines and output lines of the array. Particular PLA cells to be programmed are arbitrarily selected by word line and bit line decoders. Switches for programming the PLA cells to implement a desired logic function are controlled by data stored in a random access memory whereby programming of the PLA can be changed arbitrarily and during operation of a system including the PLA.

REFERENCES:
Neil H. E. Weste et al., "Principles of CMOS VLSI Design" (Addison-Wesley Publishing 1985) pp. 368-379.
Amar Mukherjee, "Introduction to nMOS and CMOS VLSI Systems Design" pp. 52063.

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