Programmable logic array circuit

Details Programmable logic array circuit Programmable logic array circuit

1985-09-11

1987-04-28

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307452, 307469, 307481, H03K 19096, G06F 738

Patent

active

046617280

ABSTRACT:
A programmable logic array (PLA) circuit includes a product term array and a sum term array. The product term array is coupled to the sum term array via a control transistor. A gate electrode of the control transistor is coupled to an output of the product term array, and a source (or drain) electrode is coupled to an input end of the sum term array. A drain (or source) electrode of the control transistor is coupled to a power source. N-channel type transistors are employed in the product term and the sum term arrays, while a P-channel type transistor is employed as the control transistor.

REFERENCES:
patent: 3866186 (1975-02-01), Suzuki

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