Communications: electrical – Digital comparator systems
Patent
1977-12-05
1980-06-10
Caldwell, Sr., John W.
Communications: electrical
Digital comparator systems
307207, 364716, 365 96, H03K 1908
Patent
active
042075564
ABSTRACT:
The programmable logic array arrangement comprises a plurality of cell units formed on a semiconductor substrate and wiring means for interconnecting the cell units. Each cell unit comprises a plurality of electronic elements such as resistors, transistors and diodes which are necessary to form logic circuits, and the wiring means comprises a plurality of bit lines and product term lines which are arranged in the form of a matrix, conductive layers for determining the type and input/output conditions of the logic circuit to be formed. The array arrangement further comprises a group of switching elements connected between the electronic element, bit lines, product term lines, and conductive layers for interconnecting or disconnecting these elements thereby forming desired logic circuits.
REFERENCES:
patent: 3760200 (1973-09-01), Taniguchi et al.
patent: 3909636 (1975-09-01), Masaki et al.
patent: 3974366 (1976-08-01), Hebenstreit
patent: 3983538 (1976-09-01), Jones
Kataoka Keisuke
Sugiyama Yoshi
Caldwell Sr. John W.
Myer Daniel
Nippon Telegraph and Telephone Public Corporation
Pfund Charles E.
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