Programmable latch and other circuits for logic arrays

Details Programmable latch and other circuits for logic arrays Programmable latch and other circuits for logic arrays

1975-06-27

1976-11-23

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307205, 307207, 307247R, 307289, 307DIG3, 307DIG5, H03K 3286, H03K 3353, H03K 1908, H03K 1920

Patent

active

039939197

ABSTRACT:
This specification describes means that permit the variation of circuits, particularly latch circuits, used in programmable logic array chips (PLAs). The latch circuits are changeable to enable the selection of one of three different latch configurations to be used or in combination on the same PLA chip. The differences in the circuit configurations of the different types of latches occur only in metallization pattern of the chip so that chips with different latch configurations can be manufactured with a minimum of different processing steps.

REFERENCES:
patent: 3758761 (1973-09-01), Henrion
patent: 3761902 (1973-09-01), Weinberger
patent: 3849638 (1974-11-01), Greer
macFarlane, "Pulse Generator and Flip-Flops," IEEE Trans. on Instrumentation & Measurement, vol. IM-21, No. 2, 5/1972, pp. 148-153.

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