Programmable interrupt priority encoder method and apparatus

Details Programmable interrupt priority encoder method and apparatus Programmable interrupt priority encoder method and apparatus

1991-08-12

1993-10-26

Chun, Debra A.

Boots, shoes, and leggings

364DIG11, 3642412, 3642414, 3642415, 3642302, 364DIG2, 364949, 3649413, 3649416, G06F 946

Patent

active

052573834

ABSTRACT:
A programmable, multi-level interrupt priority encoder which fields interrupts from connected devices, e.g., DMA engine, scanner, and timer, and signals an interrupt value, or priority level, associated with that device. These levels, which may range from zero to seven or more, depending upon the system with which it is applied, are used by the CPU to determine which of the plural interrupting devices to service. Using the encoder of the invention, multiple devices can be set at the same priority level.

REFERENCES:
patent: 3925766 (1975-12-01), Bardotti et al.
patent: 4296463 (1981-10-01), Dalboussiere et al.
patent: 4438489 (1984-03-01), Heinrich et al.
patent: 4486826 (1984-12-01), Wolff et al.
patent: 4493036 (1985-01-01), Boudreau et al.
patent: 4644467 (1987-02-01), McCarthy et al.
patent: 4654857 (1987-03-01), Samson et al.
patent: 4701845 (1987-10-01), Andreasen et al.
patent: 4807117 (1989-02-01), Itoku et al.
patent: 4816990 (1989-03-01), Williams
patent: 4866604 (1989-09-01), Reid
patent: 4914580 (1990-04-01), Jensen et al.
patent: 4918599 (1990-04-01), Hashimoto et al.
patent: 4920540 (1990-04-01), Baty
patent: 4926315 (1990-05-01), Long et al.
patent: 4994960 (1991-02-01), Tuchler et al.
patent: 5020024 (1991-05-01), Williams
patent: 5083258 (1992-01-01), Yamasaki
patent: 5101497 (1992-03-01), Culley et al.
Electronics & Wireless World, vol. 94, No. 1634, Dec. 1988, Surrey GB Clements "Multiprocessor Systems" pp. 1190-1192.
EDN Electrical Design News, vol. 28, No. 26, Dec. 1983, Newton, MA, U.S., pp. 270-272 Klein "FPLA Forms VME Bus Interrupter", p. 272.
Joe Salemi, "Advisor", PC Magazine, May 14, 1991, pp. 27-28.
Jeff Prosise, "Tutor", PC Magazine, May 14, 1991, pp. 441-442.

Affiliated with

Also associated with

Rating

Programmable interrupt priority encoder method and apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Programmable interrupt priority encoder method and apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programmable interrupt priority encoder method and apparatus will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-966069