Boots – shoes – and leggings
Patent
1988-06-23
1989-02-21
Shaw, Gareth D.
Boots, shoes, and leggings
364736, G06F 1300, G06F 1516, G06F 15347
Patent
active
048071838
ABSTRACT:
The interconnection chip of the present invention is a custom chip which is designed to serve as an efficient link between system functional modules, such as arithmetic units, register files and input/output ports. The chip includes a crossbar interconnection, a FIFO or programmable delay for each of its inputs and a pipeline register file for each of its outputs. By using pre-stored control patterns, the chip can configure its crossbar and delays while performing other operations. Therefore, the usual functions of busses and register files can be realized with this single chip. Various embodiments and applications for the chip are disclosed.
REFERENCES:
patent: 4145751 (1979-03-01), Carlow et al.
patent: 4393459 (1983-07-01), Huntley et al.
patent: 4644461 (1987-02-01), Jennings
patent: 4720780 (1988-01-01), Dolecek
"A Radix 4 Delay Commutator for Fast Fourier Transform Processor Implementation", Earl E. Swartzlander et al., IEEE Journal of Solid State Circuits, vol. SC-19, No. 5, Oct. 1984, pp. 702-709.
Hsu Feng-Hsiung
Kung Hsiang-Tsung
Nishizawa Teiji
Sussman Alan L.
Carnegie-Mellon University
Eakman Christina M.
Shaffer Thomas R.
Shaw Gareth D.
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