Programmable integrated circuit using topological and parametric

Details Programmable integrated circuit using topological and parametric Programmable integrated circuit using topological and parametric

1988-07-11

1991-11-26

Lee, Thomas C.

Boots, shoes, and leggings

3649278, 3649291, 364949, 3649494, 364DIG2, G06F 1520, G06F 900

Patent

active

050688235

ABSTRACT:
An apparatus architecture is provided which permits an easily programmed apparatus to serve as an equivalent of an integrated circuit chip, and/or as a building block for a large system. The apparatus is connected to a communications bus which receives apparatus parameter and topological information from a host processor and/or memory. The apparatus includes numerous functional blocks, a core, and a parametric bus. The functional blocks such as serial and parallel ports, D/A and A/D converters, biquad filters, etc. serve to process signal data and are connected in any desired manner through a switching matrix located in the core. The topology of the switching matrix is received via the communication bus. Parameters for the functional blocks are sent to the functional blocks via the communications bus, the core, and the parametric bus. Topological and/or parametric data may be burned into the switch matrix and functional blocks as permanent programmed memory, or held in programmable nonvolatile or volatile memory associated with the core and functional blocks. Signal data is typically received and transmitted via the serial and/or parallel ports and via the D/A and A/D converters (functional blocks) of the apparatus. The signal data is processed extremely quickly by having the parameterized functional blocks perform their operations on the signal data and by forwarding the results to another functional block via the topologically arranged switching matrix. Each apparatus can be made part of a larger wafer-scale system including several identical or architecturally similar apparatus by providing links between the cores of the apparatus.

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